High Performance Image Processing using TTAs
نویسندگان
چکیده
In previous ASCI papers ([1], [2]), a processor development framework for Transport Triggered Architectures (TTAs) was presented. This paper discusses the application of this framework to the design of a processor aimed at different image processing algorithms. In particular, gray-scale neighborhood operations are considered. The applicability and advantages of special function units are discussed, and the resulting processor configuration is described.
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